The pursuit of increasing quality, productivity, and product yield within the semiconductor manufacturing industry is an ongoing endeavor. To that end, the industry has developed techniques to improve operative yield by “trimming” or electrically removing inoperable or defective memory or other circuits from the main circuit. In such instances, the integrated circuit also includes redundant memory arrays or circuits that are laid out so that they can be electrically incorporated into the integrated circuit design when the defective portions are detected. In the event that a given memory block is defective, that block can be effectively “trimmed” or electrically removed from the circuit. A fuse or a group of fuses are “blown” to a high-resistance state such that the defective memory block or circuit is electrically isolated from the remaining circuit. A logic algorithm may then be used to direct the data stream to the redundant memory block or circuit.
Electrically programmable fuses typically include a fusible link formed from a polysilicon layer. As the size of semiconductor device features continues to shrink (or “scale”) the relative thickness of the polysilicon layer has generally been increasing to reduce the resistivity of conductive features formed therefrom. Because the resistivity of the polysilicon layer is not scaling at the same rate as the transistors, a relatively larger transistor is now needed to blow the fuse. Thus, an increasing fraction of the total required area of an integrated circuit design is consumed by the fuse-blowing transistors. This use of area leads to device designs that are larger than they would otherwise be, reducing the number of devices that may be placed on a wafer.
Accordingly, what is needed in the art is an improved fuse that overcomes the aforementioned deficiencies of the prior art.